Virtual Cpu Debug Register (Offset 0X5110); Virtual Cpu Shadow 1 Register (Offset 0X5114); Virtual Cpu Shadow 2 Register (Offset 0X5118); Table 325: Virtual Cpu Debug Register Fields (Offset 0X5110) - Broadcom BCM5722 Programmer's Manual

BCM5722
V CPU D
IRTUAL EBUG
Bit Field
31:13 Reserved
12:10 Irom_St[2:0]
9:6 Erom_St[3:0]
5:0 Vcpu_St[5:0]
V CPU S
IRTUAL HADOW
Bit Field
31:0 MBA configuration
register
V CPU S
IRTUAL HADOW
Bit Field
31:24 Reserved
23:0 MBA misc
configuration register
Page 323 Virtual CPU Registers (BCM5906 Only)
R (O
EGISTER FFSET

Table 325: Virtual CPU Debug Register Fields (Offset 0x5110)

Description
–
The state of the internal ROM image loading FSM
The state of the external EEPROM image loading FSM
The state of the VCPU main FSM
1 R (O
EGISTER FFSET

Table 326: Virtual CPU Debug Register Fields (Offset 0x5110)

Description
The VCPU reads the MBA configuration data from external
EEPROM.
2 R (O
EGISTER FFSET

Table 327: Virtual CPU Debug Register Fields (Offset 0x5110)

Description
–
The VCPU reads the MBA misc configuration data from external
EEPROM.
Bro adco m C orp or atio n
0 5110)
X
0 5114)
X
0 5118)
X
Programmer's Guide
10/15/07
Init Access
0 R/O
0 R/O
0 R/O
0 R/O
Init Access
0 R/W
Init Access
0 R/W
0 R/W
Document 5722-PG101-R