BCM5722
E
ROM D
XPANSION
This register is for internal CPU use only.
Bit
Field
31:0
Data
VPD C
R
ONFIG
VPD I
R
NTERFACE
EGISTER
Bit
Field
31:1
Reserved
0
VPD Req
a. Not writable by PCI configuration access.
Page 213
VPD Config Register
R
(O
ATA
EGISTER
FFSET
Table 136: Expansion ROM Data Register (0x90)
Description
Expansion ROM Data. Loaded by the firmware after
executing the ROM read cycle.
EGISTER
(O
0
FFSET
X
Table 137: VPD Interface Register (Offset 0x94)
Description
–
VPD Request. Set when the VPD Flag/Address register
is written by the host. Triggers a VPD event in the CPU
event register in the GRC. Cleared by the internal CPU.
Writes by the host to the VPD Flag register are not
accepted while this bit is set.
Bro adco m C orp or atio n
0
90)
X
94)
Programmer's Guide
10/15/07
Init
Access
0
R/W–CPU
Init
Access
0
RO
a
0
R/W
Document 5722-PG101-R
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