Broadcom BCM5722 Programmer's Manual page 2

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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R
H
EVISION
ISTORY
Revision
5722-PG101-R
5722-PG100-R
®
Broadcom
, the pulse logo, Connecting everything
among the trademarks of Broadcom Corporation and/or its affiliates in the United States, certain other countries and/or the
EU. Any other trademarks or trade names mentioned are the property of their respective owners.
Date
Change Description
10/15/07
Updated:
• Added BCM5786 chip to
Table 3: "Family Revision Levels," on page 8
Section 4: "NVRAM Configuration" on page 41
Table 171: "Device Serial No Lower DW Register (Offset
0x164)," on page 230
Table 172: "Device Serial No Upper DW Register (Offset
0x168)," on page 231
"Regulator Voltage Control Register (Offset 0x590)" on page 260
• Added BCM5787 part to
0x6838)" on page 340
0x683C)" on page 341
• Bits 9:4 in
Reg_Address 03h)," on page 418
Added:
Table 19: "Status Block Format for BCM5755 and BCM5755M
Devices," on page 54
Table 20: "Status Word Flags," on page 54
Removed:
• "NVRAM Control"
03/20/07
Added:
• BCM5722
Updated:
• Table 2: "Family Features," on page 6
• Table 53: "Flag Fields for a Ring," on page 87
• Table 146: "Subsystem ID Register (Offset 0x2E)," on page 238
• "Receive MAC Mode Register (Offset 0x468)" on page 301
• "Miscellaneous Configuration Register (Offset 0x6804)" on page 384
Broadcom Corporation
5300 California Avenue
Irvine, CA 92617
© 2007 by Broadcom Corporation
All rights reserved
Printed in the U.S.A.
®
, the Connecting everything logo, NetXtreme
Table 2: "Family Features," on page 6
"Serial EEPROM Address Register (Offset
and
"Serial EEPROM Data Register (Offset
Table 481: "PHY Identifier Registers (PHY_Addr = 0x1,
®
, and NetLink™ are

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