Table 508: Auxiliary Control Register (Phy_Addr = 0X1, Reg_Addr = 18H, Shadow = 000, Normal) - Broadcom BCM5722 Programmer's Manual

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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Programmer's Guide
10/15/07
A
C
UXILIARY
ONTROL
N
)
ORMAL
A shadow value of 000 represents normal operation.
Note: To read MII Register 18h, Shadow Register xxx :
1 Write register 18h Shadow Register 111.
Bit 15 = 0.
Bits [14:12] = xxx (Shadow Register value).
Bits [2:0] = 111 (Miscellaneous Control).
2 Read Register 18h.
Data read is the value from Shadow Register xxx .
Bits [2:0] = xxx (Shadow Register value).
To write MII Register 18h, Shadow Register yyy :
1 Write Register 18h.
Bits [15:3] = data to write.
Bits [2:0] = yyy (Shadow Register value).

Table 508: Auxiliary Control Register (PHY_Addr = 0x1, Reg_Addr = 18h, Shadow = 000, Normal)

Bit
Field
15
External Loopback
14
Extended Packet
Length
13:12
Edge Rate Control
(1000BASE-T)
11
Reserved
10
Transmit mode
9:8
Reserved
Document
5722-PG101-R
R
(PHY_A
EGISTER
Description
When bit 15 is a 1, external loopback operation is enabled. A
special cable must be inserted to provide a looped signal path.
When the bit is 0, normal operation resumes.
• 1 = External Loopback Enabled.
• 0 = Normal Operation.
When bit 14 of the Auxiliary Control Register is written to 1, the
BCM5722 Ethernet controller receives packets up to 25 KB in
length. When the bit is written to 0, the BCM5722 Ethernet
controller only receives packets up to 4.5 KB in length.
• 1 = Allow reception of extended length packets.
• 0 = Allow normal length Ethernet packets only.
Bits 13 and 12 of the Auxiliary Control Register control the edge
rate of the transmit DAC output waveform.
• 00 = 4 ns.
• 01 = 5 ns.
• 10 = 3 ns.
• 11 = 0 ns.
Write as 0, ignore on read.
Bit 10 of the Auxiliary Control Register must always be written to
1 for normal PHY operation.
• 1 = Normal operation.
• 0 = Test mode.
Write as 0, ignore on read.
Bro adco m Co rp or atio n
= 0
1, R
_A
DDR
X
EG
= 18
, S
DDR
H
HADOW
Init
0
0
00
0
1
0
Transceiver Registers
BCM5722
= 000,
Access
R/W
R/W
R/W
R/W
R/W
R/W
Page 444

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