Table 482: Auto-Negotiation Advertisement Register (Phy_Addr = 0X1, Reg_Addr = 04H) - Broadcom BCM5722 Programmer's Manual

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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BCM5722
A
-N
UTO
EGOTIATION

Table 482: Auto-Negotiation Advertisement Register (PHY_Addr = 0x1, Reg_Addr = 04h)

Bit
Field
15
Next Page
14
Reserved
13
Remote Fault
12
Reserved
Technologies
11
Asymmetric Pause
10
Pause Capable
9
100BASE-T4
Capability
Page 419
Transceiver Registers
A
R
DVERTISEMENT
EGISTER
Description
Bit 15 of the auto-negotiation advertisement register must be
written to 1 when the management software wishes to control
Next Page exchange. When this bit is written to 0, Next Page
exchange is controlled automatically by the BCM5722
Ethernet controller. When this bit is 0 and the BCM5722
Ethernet controller is advertising no 1000BASE-T capability,
no exchange of Next Pages occurs.
• 1 = Next Page ability supported
• 0 = Next Page ability not supported
Write as 0, ignore on read.
Writing a 1 to bit 13 of the auto-negotiation advertisement
register sends a remote fault indication to the link partner
during auto-negotiation. Writing a 0 to this bit clears the
remote fault transmission bit. This bit returns a 1 when
advertising remote fault, otherwise, it returns a 0.
• 1 = Advertise remote fault detected
• 0 = Advertise no remote fault detected
Bit 12 of the auto-negotiation advertisement register is
reserved for future versions of the auto-negotiation standard
and must always be written as 0. Write as 0, ignore on read.
When Bit 11 of the auto-negotiation advertisement register is
written to 1, the BCM5722 Ethernet controller advertises that
asymmetric pause is desired. When the bit is written to 0, the
BCM5722 Ethernet controller advertises that asymmetric
pause is not needed. This bit returns a 1 when advertising
asymmetric pause, otherwise, it returns a 0. When
advertising asymmetric pause, bit 10 of the auto-negotiation
advertisement register indicates the desired direction of
pause operation. Setting bit 10 to 1 indicates that pause
frames flow toward the BCM5722 Ethernet controller. Setting
bit 10 to 0 indicates that pause frames flow toward the link
partner.
• 1 = Advertise asymmetric pause
• 0 = Advertise no asymmetric pause
When Bit 10 of the auto-negotiation advertisement register is
written to 1, the BCM5722 Ethernet controller advertises full-
duplex pause capability. When the bit is written to 0, the
BCM5722 Ethernet controller advertises no pause capability.
This bit returns a 1 when advertising pause capability,
otherwise, it returns a 0.
• 1 = Capable of full-duplex Pause operation
• 0 = Not capable of Pause operation
When bit 9 of the auto-negotiation advertisement register is
written to 1, the BCM5722 Ethernet controller advertises
100BASE-T4 capability. When the bit is written to 0, the
BCM5722 Ethernet controller advertises no 100BASE-T4
capability. This bit returns a 1 when advertising 100BASE-T4
capability, otherwise, it returns a 0.
• 1 = 100BASE-T4 capable
• 0 = Not 100BASE-T4 capable
Bro adco m C orp or atio n
(PHY_A
= 0
1, R
DDR
X
Programmer's Guide
10/15/07
_A
= 04
)
EG
DDR
H
Init
Access
0
R/W
0
RO
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
Document 5722-PG101-R

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