Table 530: Misc 1000Base-X Status Register (Address 1Ch, Shadow Value 11101) - Broadcom BCM5722 Programmer's Manual

BCM5722
M 1000BASE-X S
ISC

Table 530: Misc 1000BASE-X Status Register (Address 1Ch, Shadow Value 11101)

Bit Field
15 Write Enable
14:10 Shadow Register Selector
9 TX FIFO Error
8 RX FIFO Error
7:6 Reserved
5 False Carrier Detected
4 CRC Error Detected
3 Transmit Error Detected
2 Receive Error Detected
1 Carrier Extend Error Detected • 1 = Carrier extend error since last read (extend_err
0 Early End Extension Detected • 1 = Early end extension since last read (early_end_ext
Write Enable
During a write to this register, setting Misc 1000BASE-X Status register bit 15 allows writing to bits [9:0] of this register. For
reading the values of bits [9:0], perform an MDIO write with bit 15 cleared and preferred shadow values in bits [14:10]. The
next MDIO read of register address 1Ch contains the preferred shadow register values in bits [9:0].
Shadow Register Selector
Register bits [14:10] must be set to 11101 to enable read/write to the Misc 1000BASE-X Status register.
TX FIFO Error
Bit 9 of Misc 1000BASE-X Status register indicates a transmit FIFO error since the last read.
RX FIFO Error
Bit 8 of Misc 1000BASE-X Status register indicates a receive FIFO error since the last read.
Page 473 Transceiver Registers
(PHY_A
TATUS DDR
Description
• 1 = Write bits [9:0].
• 0 = Read bits [9:0].
11101 = Misc 1000BASE-X Status register.
• 1 = Transmit FIFO error since last read.
• 0 = No transmit FIFO error since last read.
• 1 = Receive FIFO error since last read.
• 0 = No receive FIFO error since last read.
Write as 00, ignore when read.
• 1 = False carrier detected since last read.
• 0 = No false carriers detected since last read.
• 1 = CRC Error detected since last read.
• 0 = No CRC error detected since last read or mode is
disabled via register 1Ch, shadow 11011, bit 0.
• 1 = Transmit error code detected since last read
(rx_data_error state in PCS receive).
• 0 = No transmit error code detected since last read.
• 1 = Receive error since last read (early_end state in
PCS receive).
• 0 = No receive error since last read.
state in PCS receive).
• 0 = No carrier extend error since last read.
state in PCS receive).
• 0 = No early end extension since last read.
Bro adco m C orp or atio n
= 0 1, R _A = 1C
X EG DDR
Programmer's Guide
10/15/07
, S 11101
H HADOW B
Init Access
0 R/W
11101 R/W
0 RO
LH
0 RO
LH
00 RO
LH
0 RO
LH
0 RO
LH
0 RO
LH
0 RO
LH
0 RO
LH
0 RO
LH
Document 5722-PG101-R
)