Table 477: Transceiver Register Map - Broadcom BCM5722 Programmer's Manual

Programmer's Guide
10/15/07
T R
RANSCEIVER
This section describes the MII registers of the integrated 10/100/1000T PHY transceivers. The access to the transceiver
registers is provided indirectly through the MII Communication Register (see
on page 251) of the MAC. The transceiver registers are accessed with the PHY_Addr bit of the MII Communication Register
set to 0x1. The integrated transceiver contains the set of registers shown in
Note: The 10/100/1000T PHY transceiver is not applicable to BCM5906 as it is a 10/100 PHY. Refer to
"Transceiver Registers (BCM5906/BCM5906M)" on page 481
Reg_Addr
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0B-0Eh
0Fh
10h
11h
12h
13h
14h
15h-17h
18h
19h
1Ah
1Bh
1Ch
1D-1Fh
* Reserved registers should never be read or written.
R/W = Read/Write; RO = Read only
LH = Latched High; LL = Latched Low
H = Fixed High; L = Fixed Low
SC = Self Clear
Document 5722-PG101-R
EGISTERS

Table 477: Transceiver Register Map

Register
MII Control register
MII Status register
PHY Identifier
PHY Identifier
Auto-negotiation Advertisement
Auto-negotiation Link Partner BASE Page Ability
Auto-negotiation Expansion register
Auto-negotiation Next Page Transmit
Auto-negotiation Link Partner Received Next Page
1000BASE-T Control register
1000BASE-T Status register
Reserved*
IEEE Extended Status register
PHY Extended Control register
PHY Extended Status register
Receive Error Counter
False Carrier Sense Counter
Receiver NOT_OK Counters
Reserved*
Auxiliary Control register
Auxiliary Status Summary register
Interrupt Status register
Interrupt Mask register
Reserved*
Test Registers
Bro adco m Co rp or atio n
"MI Communication Register (Offset 0x44C)"
Table 477.
for information on those devices.
Transceiver Registers
BCM5722
Page 414