BCM5722
The following components are involved in BCM5722 Ethernet controller configuration space mapping:
•
Base Address registers
•
Standard mode map mode
•
Flat memory map mode
•
Indirect access mode
•
Configuration space header
•
Host memory
MAC registers
•
•
MAC local memory
F
O
UNCTIONAL
VERVIEW
PCI Configuration Space Registers
The BCM5722 Ethernet controller configuration space can be broken into two regions: Header and Device Specific.
on page 186
shows the registers implemented to support PCI/PCI-X/PCIe functionality in the BCM5722 Ethernet controller.
Reserved fields in PCI configuration registers will always return zero.
PCI Required Header Region
The bit-7 of the Header Type register (Offset 0x0E) in the PCI Required Header Region is used to identify whether the device
is a single function device or multifunction device.
Note: BIOS programmers should take special care to read bit_7 in PCI Header Type register (Offset 0x0E)
before scanning the BCM5722 Ethernet controller PCI configuration space.
Single function PCI devices may decode access to non-implemented device functions in two ways, per Section 3.2.2.3.4 of
the PCI 2.2 specification:
•
A single function device may optionally respond to all function numbers as the same.
•
May decode the function number field and respond only to function 0.
The BCM5722 Ethernet controller single function chips follow the stated technique #1— BIOS code scanning multifunctions
get a target response from function(s) 1–7, but these functions are essentially shadows of function 0. Software that programs
to function(s) 1–7 is re-mapped to function 0.
Page 109
Configuration Space
DeviceFunctions:
Single Function = 0
Multi-Function = 1
Func
[7]
[6]
Figure 38: Header Type Register 0xE
Bro adco m C orp or atio n
Header Layout
Programmer's Guide
10/15/07
Table 92
[0]
Document 5722-PG101-R
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