Table 81: Wol Mode Clock Inputs; Table 82: Magic Packet Detection Logic Enable - Broadcom BCM5722 Programmer's Manual

Programmer's Guide
10/15/07
Power Management
The clocking inputs need to be modified for WOL mode (see
so its clock can be disabled. The MAC has an internal phase-locked loop that clocks internal logic at 133 MHz. Software
must select an alternate clocking source and then disable this PLL.
Register
PCI Clock_Control
PCI Clock_Control
PCI Clock_Control
The settings shown in Table 82
sert PME on the PCI bus. The RX MAC should maintain the multicast and broadcast settings that were previously configured
by the NOS. The Microsoft power management specification states:
"Only a frame that passes the device's MAC, broadcast, or multicast address filter and matches on the previously loaded
sample patterns will cause the wake-up signal to be asserted."
The ACPI_Power-on bit needs to be set for pattern match, but not for Magic Packet recognition. The Magic Packet detection
mechanism is separate from the pattern match mechanism. Host software may configure WOL using four filter permutations:
• Pattern match WOL disabled. Magic Packet disabled.
• Pattern match WOL enabled. Magic Packet disabled.
• Pattern match WOL disabled. Magic Packet enabled.
• Pattern match WOL enabled. Magic Packet enabled.
Register
PCI Power_Management_Control/Status
PCI Power_Management_Control/Status
Ethernet_MAC_Mode
Ethernet_MAC_Mode
Document 5722-PG101-R

Table 81: WOL Mode Clock Inputs

Bit
RX RISC_Clock_Disable
Select_Alternate_Clock
PLL133
enable Magic Packet detection logic in the MAC. These setting also enable the MAC to as-

Table 82: Magic Packet Detection Logic Enable

Bit(s)
PME_Enable
Power_State
ACPI_Power-On
Magic_Packet_Detection
Bro adco m Co rp or atio n
Table 81). The RX CPU is not required during WOL operation,
Wake on LAN Mode/Low-Power
BCM5722
Recommended Value
Set the bit to 1
Set the bit to 1
Set the bit to 1
Recommended Value
Enable
0x03
See above
See above
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