Table 557: Auxiliary Multiple Phy Register (Address 30D, 1Eh) - Broadcom BCM5722 Programmer's Manual

BCM5722
Auxiliary Multiple PHY Register
Bit Name
15 HCD_TX_FDX
14 HCD_T4
13 HCD_TX
12 HCD_10BASE-T_FDX
11 HCD_10BASE-T
10:9 Reserved
8 Restart Auto-Negotiation
7 Auto-Negotiation Complete
6 Acknowledge Complete
5 Acknowledge Detected
4 Ability Detect
3 Super Isolate
2 Reserved
1 10BASE-T Serial Mode
0 Reserved
R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read
operation. Use default values of reserved bit(s) when writing to reserved bit(s).
HCD Bits
Bits 15:11 of the Auxiliary Multiple PHY register are five read-only bits that report the highest common denominator (HCD)
result of the auto-negotiation process. Immediately upon entering the Link Pass state after each reset or Restart Auto-
Negotiation, only one of these five bits will be 1. The Link Pass state is identified by a 1 in bit 6 or 7 of this register. The HCD
bits are reset to 0 every time auto-negotiation is restarted or the PHY is reset. Note that for their intended application, these
bits uniquely identify the HCD only after the first Link Pass after reset or restart of auto-negotiation. On later link fault and
subsequent renegotiations, if the ability of the link partner is different, more than one of the above bits may be active.
Restart Auto-Negotiation
A self-clearing bit that allows the auto-negotiation process to be restarted, regardless of the current status of the state
machine. For this bit to work, auto-negotiation must be enabled. Writing a 1 to this bit restarts auto-negotiation. Since the bit
is self-clearing, it always returns a 0 when read. The operation of this bit is identical to bit 9 of the Control register.
Auto-Negotiation Complete
This read-only bit returns a 1 after the auto-negotiation process has been completed. It remains 1 until the auto-negotiation
process is restarted, a link fault occurs, or the chip is reset. If auto-negotiation is disabled or the process is still in progress,
the bit returns a 0.
Page 507 Transceiver Registers (BCM5906/BCM5906M)

Table 557: Auxiliary Multiple PHY Register (Address 30d, 1Eh)

R/W Description
RO 1 = Auto-negotiation result is 100BASE-TX full-duplex
RO 1 = Auto-negotiation result is 100BASE-T4
RO 1 = Auto-negotiation result is 100BASE-TX
RO 1 = Auto-negotiation result is 10BASE-T full-duplex
RO 1 = Auto-negotiation result is 10BASE-T
- -
R/W (SC) 1 = Restart auto-negotiation process 0 = (No effect)
RO 1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
RO 1 = Auto-Negotiation Acknowledge completed
RO 1 = Auto-Negotiation Acknowledge detected
RO 1 = Auto-Negotiation Waiting for LP ability
R/W 1 = Super Isolate mode 0 = Normal operation
- -
R/W 1 = Enable 10BASE-T Serial mode
0 = Disable 10BASE-T Serial mode
- -
Bro adco m C orp or atio n
Programmer's Guide
10/15/07
Default
0
0
0
0
0
00
0
0
0
0
0
0
0
0
0
Document 5722-PG101-R