BCM5722
B
D
I
ASIC
RIVER
F
S
LOWCHART FOR
ERVICING AN
The following figure shows the basic driver interrupt service routine flow.
Tell the OS "N ot my interrupt", and
R ETU RN (this is important for interrupt-
sharing environm ents)
No more work to do. Exit the D PC
Page 183
Basic Driver Interrupt Processing Flow
P
NTERRUPT
ROCESSING
I
NTERRUPT
NIC encounters an Interrupt event and
asserts in IN TA# line to interrupt host
H ost OS receives Interrupt and calls NIC
Driver reads the "status w ord" field in the
570X's "Status Block" (located in host
Is the "U pdated bit" set in the Status
N o
ISR Code
DPC C ode
Process any Link Status change events.
Process any received packets (receive
Process any completed transmits (transmit
Enable Interrupts by w riting the Interrupt
Read Interrupt M ailbox 0 in order to flush
any posted writes in the PCI chipset.
Is the "U pdated bit" set in
No
Figure 67: Basic Driver Interrupt Service Routine Flow
Bro adco m C orp or atio n
F
LOW
driver's ISR
m emory)
Yes
Block?
interrupts).
interrupts).
Mailbox 0 register to '0'.
R ead the,
the Status Block?
Programmer's Guide
D river writes a value of '"1" into the 570X's
Interrupt M ailbox 0 register. W hile this register
contains a nonzero value, it prevents future
interrupt assertions from the 570X.
D river clears the "updated" bit in the Status
Block.
D river claim s the Interrupt and schedules a
callback to handle the interrupt processing
(m any OSes due this via a low er priority
thread). Allternatively, the driver could directly
invoke the interrupt processing code.
There is m ore w ork to do. Force an interrupt
by setting bit 2 in the M isc Local Control
Regsiter (offset 0x6808)
Yes
Document 5722-PG101-R
10/15/07
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