Table 456: Dllp Error Counter (Offset 0X7D44); Table 457: Nak Received Counter (Offset 0X7D48); Table 458: Data Link Test Register (Offset 0X7D4C) - Broadcom BCM5722 Programmer's Manual

Programmer's Guide
10/15/07
DLLP E C
RROR OUNTER
Bit Field
31:16 Reserved
15:0 DLLP Error Counter
NAK R C
ECEIVED OUNTER
Bit Field
31:16 Reserved
15:0 NAK Received Counter Counts number of NAK DLLPs received since last read.
D L T R
ATA INK EST EGISTER
Bit Field
31:16 Reserved
15 Store Receive TLPs
14 Disable TLPs
13 Disable DLLPs
12 Force PHY Link Up
11 Bypass Flow Control
10 Enable RAM Core Clock
Margin Test Mode
9 Enable RAM Overstress
Test Mode
8 Enable RAM Read Margin
Test Mode
7 Speed up Completion
Timer
6 Speed up Replay Timer
5 Speed up ACK Latency
Timer
4 Speed up PME Service
Timer
3 Force Purge
2 Force Retry
Document 5722-PG101-R
(O 0 7D44)
FFSET X

Table 456: DLLP Error Counter (Offset 0x7D44)

Description
Write as 0, ignore when read.
Counts number of bad DLLPs received (includes bad
LCRC or bad length) since last read. Counter freezes at
max value and will be cleared to one if event occurs
simultaneously to read.
(O 0 7D48)
FFSET X

Table 457: NAK Received Counter (Offset 0x7D48)

Description
Write as 0, ignore when read.
Counter freezes at max value and will be cleared to one
if event occurs simultaneously to counter read.
(O 0 7D4C)
FFSET X

Table 458: Data Link Test Register (Offset 0x7D4C)

Description
Write as 0, ignore when read.
Write received TLPs into retry buffer instead of
transmitted TLPs.
Disable transmission of TLPs.
Disable transmission and reception of DLLPs.
Force PHY link input to data link layer to be up.
Force flow control init flags to be set and available TX flow
control credits to infinite.
Enable retry buffer RAM core clock margin test mode.
Enable retry buffer RAM overstress test mode.
Enable retry buffer RAM read margin test mode.
Speed up completion timer and LED blink rate for
simulation.
Speed up replay timer for simulation.
Speed up ACK latency timer for simulation.
Speed up PME service timer for simulation.
Purge the contents of the retry buffer.
Retransmit the contents of the retry buffer.
Bro adco m Co rp or atio n
BCM5722
Init Access
0 RO
0 RO/CR
Init Access
0 RO
0 RO/CR
Init Access
0 RO
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 W/SC
0 W/SC
PCIe Registers Page 402