Programmer's Guide
10/15/07
Bit
Field
11
Allow Bad Frames
10
Reserved
9
No Frame Cracking
8–6
Reserved
5
Word Swap Data
4
Byte Swap Data
3
Reserved
2
Word Swap Non-frame Data Word swap control structures (buffer descriptors, statistics)
1
Byte Swap Non-frame Data Byte swap control structures (buffer descriptors, statistics)
0
Reserved
Document
5722-PG101-R
Table 342: Mode Control Register (Offset 0x6800) (Cont.)
Description
The RX MAC forwards illegal frames to the NIC and marks
them as such instead of discarding them. The frames are
queued based on default class and interrupt distribution
queue number as specified in
Configuration Register (Offset 0x2010)" on page
–
Turn off all frame cracking functionality in both the read DMA
engine and the MAC receive engine. On receive, the TCP/
UDP checksum field is replaced by raw checksum for the
whole frame except the Ethernet header.
On transmit, IP and TCP/UDP checksum generation is always
disabled when this bit is set. Also, the raw checksum is
calculated over the entire frame except the Ethernet header
and CRC.
–
Word swap data when DMAing it across the PCI bus.
Byte swap data when DMAing it across the PCI bus.
–
and data when DMAing them across the PCI bus.
when DMAing them across the PCI bus.
–
Bro adco m Co rp or atio n
"Receive List Placement
283).
General Control Registers
BCM5722
Init
Access
0
R/W
0
0
R/W
000
RO
0
R/W
0
R/W
0
RO
0
R/W
0
R/W
0
RO
Page 334
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