Broadcom BCM5722 Programmer's Manual page 58

BCM5722 Programmer's Guide
10/15/07
Power Control).................................................................................................................................447
Table 511: Auxiliary Control Register (PHY_Addr = 0x1, Reg_Addr = 18h, Shadow = 100, Misc Test 1) .....448
Table 512: Auxiliary Control Register (PHY_Addr = 0x1, Reg_Addr = 18h, Shadow = 111, Misc Control)....449
Table 513: Auxiliary Status Summary Register (PHY_Addr = 0x1, Reg_Addr = 19h) ....................................450
Table 514: Interrupt Status Register (PHY_Addr = 0x1, Reg_Addr = 1Ah) ....................................................453
Table 515: Interrupt Mask Register (PHY_Addr = 0x1, Reg_Addr = 1Bh)......................................................455
Table 516: Spare Control 1 Register (Address 1Ch, Shadow Value 00010) ..................................................455
Table 517: Clock Alignment Control Register (Address 1Ch, Shadow Value 00011).....................................456
Table 518: Spare Control 2 Register (Address 1Ch, Shadow Value 00100) ..................................................457
Table 519: Spare Control 3 Register (Address 1Ch, Shadow Value 00101) ..................................................458
Table 520: LED Status Register (Address 1Ch, Shadow Value 01000) .........................................................459
Table 521: LED Control Register (Address 1Ch, Shadow Value 01001)........................................................461
Table 522: Auto Power Down Register (Address 1Ch, Shadow Value 01010)...............................................462
Table 523: LED Selector 1 Register (Address 1Ch, Shadow Value 01101) ...................................................463
Table 524: LED Selector 2 Register (Address 1Ch, Shadow Value 01110) ...................................................465
Table 525: LED GPIO Control/Status Register (Address 1Ch, Shadow Value 01111)...................................466
Table 526: Autodetect SGMII/Media Converter Register (Address 1Ch, Shadow Value 11000) ...................467
Table 527: 1000BASE-X Auto-Negotiation Debug Register (Address 1Ch, Shadow Value 11010)...............468
Table 528: Auxiliary 1000BASE-X Control Register (Address 1Ch, Shadow Value 11011) ...........................470
Table 529: Auxiliary 1000BASE-X Status Register (Address 1Ch, Shadow Value 11100) ............................471
Table 530: Misc 1000BASE-X Status Register (Address 1Ch, Shadow Value 11101)...................................473
Table 531: Autodetect Medium Register (Address 1Ch, Shadow Value 11110) ............................................475
Table 532: Mode Control Register (Address 1Ch, Shadow Value 11111)......................................................477
Table 533: HCD Status Register (PHY_Addr = 0x1, Reg_Addr = 1Dh, Bit 15 = 1) ........................................479
Table 534: Master/Slave Seed Register (PHY_Addr = 0x1, Reg_Addr = 1Dh, Bit 15 = 0).............................480
Table 535: PHY Test Register 1 (PHY_Addr = 0x1, Reg_Addr = 1Eh) ..........................................................480
Table 536: MII Management Frame Format ...................................................................................................481
Table 537: MII Register Summary ..................................................................................................................482
Table 538: Control Register (Address 00d, 00h) ............................................................................................484
Table 539: MII Status Register (Address 01d, 01h) ........................................................................................486
Table 540: PHY Identifier Registers (Addresses 02d and 03d, 02h and 03h) ................................................487
Table 541: Auto-Negotiation Advertisement Register (Address 04d, 04h) .....................................................488
Table 542: Auto-Negotiation Link Partner Ability Register (Address 05d, 05h) ..............................................489
Table 543: Auto-Negotiation Expansion Register (Address 06d, 06h) ...........................................................490
Table 544: Next Page Transmit Register (Address 07d, 07h) ........................................................................491
Bro adco m C orp or atio n
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