Programmer's Guide
10/15/07
R
E
C
ECEIVE
RROR
OUNTER
This counter increments each time the BCM5722 Ethernet controller receives a non-collision packet containing at least one
receive error (freezes at the maximum value FFFFh). The counter automatically clears when read.
Table 492: Receive Error Counter (PHY_Addr = 0x1, Reg_Addr = 12h)
Bit
Field
15:0
Receive Error Counter Number of non-collision packets with receive errors since
F
C
S
ALSE
ARRIER
ENSE
S3MII Error Counter increments each time the BCM5722 Ethernet controller detects a S3MII overrun/underrun event. False
Carrier Sense Counter increments each time the BCM5722 Ethernet controller detects a false carrier on the receive input.
These counters freeze at the maximum value FFh. The counters automatically clear when read.
Table 493: False Carrier Sense Counter (PHY_Addr = 0x1, Reg_Addr = 13h)
Bit
Field
15:8
Reserved
7:0
False Carrier Sense
Counter
Document
5722-PG101-R
(PHY_A
= 0
DDR
Description
last read.
C
(PHY_A
OUNTER
DDR
Description
–
Number of false carrier sense events since last read.
Bro adco m Co rp or atio n
1, R
_A
= 12
X
EG
DDR
= 0
1, R
_A
X
EG
DDR
BCM5722
)
H
Init
Access
0000h
R/W
= 13
)
H
Init
Access
00h
R/W
Transceiver Registers
Page 432
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