Broadcom BCM5722 Programmer's Manual page 36

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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BCM5722
Programmer's Guide
10/15/07
L
F
IST OF
IGURES
Figure 1: Typical BCM5755-Based NIC Board Block Diagram .......................................................................10
Figure 2: Typical BCM5754-Based NIC Board Block Diagram .......................................................................12
Figure 3: Functional Block Diagram ................................................................................................................14
Figure 4: Receive Data Path ...........................................................................................................................15
Figure 5: Transmit Data Path ..........................................................................................................................17
Figure 6: ISO SBD Internal Block Diagram .....................................................................................................19
Figure 7: Time-Sync Packet ............................................................................................................................20
Figure 8: Sample Traffic Flow with ISO and Normal Data Packets .................................................................22
Figure 9: DMA Read Engine ...........................................................................................................................25
Figure 10: DMA Write Engine............................................................................................................................26
Figure 11: ASF System Architecture .................................................................................................................27
Figure 12: SMBus Start and Stop Conditions....................................................................................................29
Figure 13: Two Masters Arbitrate for SMBus ....................................................................................................30
Figure 14: Master Stops Transaction After Slave NAKs ...................................................................................30
Figure 15: SMBus Transaction Phases.............................................................................................................31
Figure 16: SMB_CLOCK Period (Master Mode) ...............................................................................................31
Figure 17: Host Coalescing Engine ...................................................................................................................33
Figure 18: Media Independent Interface ...........................................................................................................36
Figure 19: GMII Block........................................................................................................................................38
Figure 20: MDI Register Interface .....................................................................................................................39
Figure 21: Generic Ring Diagram......................................................................................................................43
Figure 22: Transmit Ring Data Structure Architecture Diagram ........................................................................45
Figure 23: Receive Return Ring Memory Architecture Diagram .......................................................................48
Figure 24: Receive Buffer Descriptor Cycle ......................................................................................................60
Figure 25: Receive Producer Ring RCB Setup .................................................................................................62
Figure 26: Mailbox Registers.............................................................................................................................64
Figure 27: Class of Service Example ................................................................................................................68
Figure 28: Overview Diagram of RX Flow .........................................................................................................70
Figure 29: RSS Receive Processing Sequence................................................................................................72
Figure 30: Relationships Between All Components of a Send Ring .................................................................75
Figure 31: Max_Len Field in Ring Control Block ...............................................................................................75
Figure 32: Relationship Between Send Buffer Descriptors ...............................................................................76
Figure 33: Scatter Gather of Frame Fragments ................................................................................................78
Bro adco m C orp or atio n
Page xxxvi
Document 5722-PG101-R

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