BCM5722
TCP S
EGMENTATION
Offset
0x0ce0–0x0ce3
0x0ce4–0x0ce7
0x0ce8–0x0ceb
0x0cec–0x0cef
0x0cf0–0x0cf3
0x0cf4–0x0cf7
0xcf8–0xfff
L
H
A
OWER
OST
DDRESS
Table 236: Lower Host Address Register for TCP Segmentation (Offset 0xCE0)
Bit
Field
31:0
U
H
A
PPER
OST
DDRESS
Table 237: Upper Host Address Register for TCP Segmentation (Offset 0xCE4)
Bit
Field
31:0
L
/O
R
ENGTH
FFSET
EGISTER FOR
Table 238: Length/Offset Register for TCP Segmentation (Offset 0xCE8)
Bit
Field
31:23
Reserved
22:16
MBUF offset
15:0
Page 273
TCP Segmentation Control Registers
C
R
ONTROL
Table 235: TCP Segmentation Control Registers
Registers
Lower Host Address Register for TCP Segmentation
Upper Host Address Register for TCP Segmentation
Length/Offset Register for TCP Segmentation
DMA Flags Register for TCP Segmentation
VLAN Tag Register for TCP Segmentation
Pre-DMA Command Exchange Register for TCP Segmentation
Reserved
R
TCP S
EGISTER FOR
Description
Specifies the lower 32 bits of the starting address in host
memory where the transmit data buffer resides.
R
TCP S
EGISTER FOR
Description
Specifies the upper 32 bits of the starting address in host
memory where the transmit data buffer resides.
TCP S
EGMENTATION
Description
–
MBUF offset. It specifies the offset of the first TXMBUF at
where the DMA starts putting data. The valid value is
between 48 and 128.
Specifies the length of data to be transmitted. Although
firmware can specify up to 64 KB, it should not attempt to
program more than 8 KB because it would exceed the
size of TXMBUF.
Bro adco m C orp or atio n
EGISTERS
(O
EGMENTATION
(O
EGMENTATION
(O
FFSET
Programmer's Guide
0
CE0)
FFSET
X
Init
Access
0
R/W
0
CE4)
FFSET
X
Init
Access
0
R/W
0
CE8)
X
Init
Access
0
RO
0
R/W
0
R/W
Document 5722-PG101-R
10/15/07
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