Figure 25: Receive Producer Ring Rcb Setup - Broadcom BCM5722 Programmer's Manual

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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Programmer's Guide
10/15/07
RCB Setup Pseudo Code
An example of setting up receive producer ring RCB:
Content of Pointer_to_RX_PRODUCER_RING_RCB + 0x00 = Host address of standard receive
producer ring high 32.
Content of Pointer_to_RX_PRODUCER_RING_RCB + 0x04 = Host address of standard receive
producer ring low 32.
Content of Pointer_to_RX_PRODUCER_RING_RCB + 0x0a = No flags.
Content of Pointer_to_RX_PRODUCER_RING_RCB + 0x08 = Max packet size of 1518.
Content of Pointer_to_RX_PRODUCER_RING_RCB + 0x0c = Internal Memory address for device copy
of ring.
Figure 25
shows the standard ring RCB for the setup of a host-based standard producer ring.
Receive Buffer Descriptors (BDs) begin on the Receive Producer Ring. The host device driver will populate the receive
producer ring with a specified number of BDs supported by the receive producer ring (see
page
61). When a packet is received, the RX MAC moves the packet data into internal memory. The Receive MTU Size
register (see
"Receive MTU Size Register (Offset 0x43C)" on page
MAC; packets larger than the Receive MTU are marked oversized and are discarded.
Offset
0x00
0x04
0x08
0x0c
Standard Producer Ring RCB
R
B
D
ECEIVE
UFFER
The Receive Buffer Descriptor is a data structure in host memory. It is the basic element that makes up each receive
producer and receive return ring. The format of receive buffer descriptors can be seen in
buffer descriptor has a 64-bit memory address and may be in any memory alignment and may point to any byte boundary.
For performance and CPU efficiency reasons, it is recommended that memory be cache-aligned. The BCM5722 Ethernet
controller supports cache line sizes of 8, 16, 32, 64, 128, 256, and 512 bytes. The cache line size value is important for the
controller to determine when to use the PCI memory write and invalidate command. There are no requirements for memory
alignment or cache line integrity for the BCM5722 Ethernet controller.
Unlike send buffer descriptors, the receive buffer descriptors cannot be chained to support multiple fragments.
Document
5722-PG101-R
31
16
15
Host Ring Address
Max_Len
NIC Ring Address

Figure 25: Receive Producer Ring RCB Setup

ESCRIPTORS
Bro adco m Co rp or atio n
250) specifies the largest packet accepted by the RX
0
Flags
Standard Producer Ring
"Receive Producer Ring" on
511
512
BD 1
Std Ring
BD 2
BD 3
Table 15 on page
Receive Producer Ring
BCM5722
50. A receive
Page 62

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