Broadcom BCM5722 Programmer's Manual page 11

Programmer's Guide
10/15/07
Transmit MAC .............................................................................................................................. 171
Receive MAC ............................................................................................................................... 171
Statistics Block............................................................................................................................. 172
PHY Auto-Negotiation.................................................................................................................. 173
Register Quick Cross Reference ........................................................................................................ 173
Integrated PHYs .......................................................................................................................... 173
Integrated MACs .......................................................................................................................... 174
Flow Control Initialization Pseudocode ............................................................................................... 174
Section 11: Interrupt Processing.................................................................................... 177
Host Coalescing ....................................................................................................................................... 177
Description .......................................................................................................................................... 177
Operational Characteristics................................................................................................................. 177
Registers............................................................................................................................................. 178
MSI ............................................................................................................................................................. 179
Traditional Interrupt Scheme............................................................................................................... 179
Message Signaled Interrupt ................................................................................................................ 180
PCI Configuration Registers ............................................................................................................... 181
MSI Address ................................................................................................................................ 181
MSI Data ...................................................................................................................................... 181
Host Coalescing Engine...................................................................................................................... 182
Firmware ............................................................................................................................................. 182
Basic Driver Interrupt Processing Flow ................................................................................................. 183
Flowchart for Servicing an Interrupt .................................................................................................... 183
Interrupt Procedure ............................................................................................................................. 184
Other Configuration Controls ................................................................................................................. 185
Broadcom Mask Mode ........................................................................................................................ 185
Broadcom Tagged Status Mode ......................................................................................................... 185
Clear Ticks on BD Events Mode ......................................................................................................... 185
No Interrupt on Force Update ............................................................................................................. 185
No Interrupt on DMAD Force .............................................................................................................. 185
Section 12: BCM5722 Ethernet Controller Register Definitions.................................. 186
PCI Configuration Registers ................................................................................................................... 186
Vendor ID Register (Offset 0x00)........................................................................................................ 189
Device ID Register (Offset 0x02) ........................................................................................................ 189
Document 5722-PG101-R
Bro adco m Co rp or atio n
BCM5722
Page xi