Programmer's Guide
10/15/07
F
P
IRMWARE
OWER
Bit
Field
15:13
Power Rail
12:10
Type
9:8
PM State
7:0
Base Power
F
P
IRMWARE
OWER
Bit
Field
15:13
Power Rail
12:10
Type
9:8
PM State
7:0
Base Power
Document
5722-PG101-R
B
R
UDGETING
EGISTER
Table 183: Firmware Power Budgeting Register 7 (Offset 0x188)
Description
Specifies the power rail of the operating condition
12V (000)
3.3V (001)
1.8V (010)
Thermal (111)
Specifies the type of the operating condition
PME Aux (000)
Auxiliary (001)
Idle (010)
Sustained (010)
Maximum (111)
Specifies the power management state of operating
condition—D0, D3
Specifies in Watts the base power value in a given
operating conditions
B
R
UDGETING
EGISTER
Table 184: Firmware Power Budgeting Register 8 (Offset 0x18A)
Description
Specifies the power rail of the operating condition
12V (000)
3.3V (001)
1.8V (010)
Thermal (111)
Specifies the type of the operating condition
PME Aux (000)
Auxiliary (001)
Idle (010)
Sustained (010)
Maximum (111)
Specifies the power management state of operating
condition—D0, D3
Specifies in Watts the base power value in a given
operating conditions
Bro adco m Co rp or atio n
7 (O
0
188)
FFSET
X
8 (O
0
18A)
FFSET
X
BCM5722
Init
Access
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
Init
Access
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
0x0
RW from Internal CPU
Config RO
Memory RW
PCIe-Enhanced Capabilities
Page 236
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