BCM5722
Auxiliary Status 3 Register (Shadow Register)
Table 562: Auxiliary Status 3 Register (Shadow Register 28d, 1Ch)
BIt
Name
15:8
Noise[7:0]
7:4
Reserved
3:0
FIFO Consumption[3:0]
MII shadow register bank 1 is accessed by setting MII register 1Fh bit 7 to a 1.
R/W = Read/Write, RO = Read only, SC = Self Clear, LL = Latched Low, LH = Latched High, LL and LH Clear after read
operation. Use default values of reserved bit(s) when writing to reserved bit(s).
Noise[7:0]
The PHY provides the current mean-squared error value for noise when a valid link is established.
FIFO Consumption[3:0]
The PHY indicates the number of nibbles of FIFO currently used.
Page 511
Transceiver Registers (BCM5906/BCM5906M)
R/W
Description
R/O
Current mean-squared error value, valid only if link is
established
-
-
R/O
Currently utilized number of nibbles in the receive FIFO 0000
Bro adco m C orp or atio n
Programmer's Guide
10/15/07
Default
00h
000h
Document 5722-PG101-R
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