BCM5722
Bit
Field
19
RSS TCP/IPv6 Hash Enable
(BCM5722, BCM5755, BCM5755M,
BCM5756M, BCM5757 only)
Reserved (other devices)
18
RSS IPv6 Hash Enable (BCM5722,
BCM5755, BCM5755M,
BCM5756M, BCM5757 only)
Reserved (other devices)
17
RSS TCP/IPv4 Hash Enable
(BCM5722, BCM5755, BCM5755M,
BCM5756M, BCM5757 only)
Reserved (other devices)
16
RSS IPv4 Hash Enable (BCM5722,
BCM5755, BCM5755M,
BCM5756M, BCM5757 only)
Reserved (other devices)
15:13
Reserved
12
Extended Hash En
11
Filt_broadcast
10
Keep VLAN Tag Diag Mode
9
No_CRC_Check
8
Promiscuous Mode
7
Length Check
6
Accept Runts
5
Reserved
4
Keep Pause
3
Reserved
2
Enable Flow Control
1
Enable
0
Reset
Page 255
Ethernet MAC Control Registers
Table 207: Receive MAC Mode Register (Offset 0x468) (Cont.)
Description
When this bit is set, 4-tuple hashes are enabled for TCP
over IPv6 packets. This bit should be set to 0 if IPv6 RX is
disabled.
When this bit is set, 2-tuple hashes are enabled for IPv6
packets. This bit should be set to 0 if IPv6 RX is disabled.
When this bit is set, 4-tuple hashes are enabled for TCP
over IPv4 packets.
When this bit is set, 2-tuple hashes are enabled for IPv4
packets.
–
Enable extended hash table size of 256 entries. By default,
the hash table supports 128 entries with a 7-bit CRC value.
When set, reception of broadcast frames is disabled.
If set, forces Receive MAC to keep the VLAN tag in the
frame. This is for debugging purpose only and should be
reset during normal operation.
No CRC check by receive MAC on incoming frames. Also,
allows the reception of packets received with RXERR on
the MII/GMII.
No source address or MC hashing checking will be
performed on incoming frames. All frames will be
accepted.
If set, IEEE 802.2 length checking is done on LLC frames. 0
If set, the MAC accepts packets less than 64 bytes.
–
If set, the MAC forwards pause frame to host buffer.
–
Enable automatic processing of IEEE 802.3x flow control
frames. This bit is orthogonal to the Keep Pause bit.
This bit controls whether the Receive MAC state machine
is active or not. When set to 0, it completes the current
operation and cleanly halts. Until it is completely halted, it
remains 1 when read.
When this bit is set to 1, the Receive MAC state machine
will be reset. This is a self-clearing bit.
Bro adco m C orp or atio n
Programmer's Guide
10/15/07
Init
Access
0
R/W
0
RO
0
R/W
0
RO
0
R/W
0
RO
0
R/W
0
RO
0
RO
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
R/W
0
R/W
0
R/W
0
R/W
0
RO
0
R/W
0
R/W
0
R/W
Document 5722-PG101-R
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