Buffer Manager Mode Register (Offset 0X4400); Table 298: Buffer Manager Mode Register (Offset 0X4400); Table 299: Buffer Manager Status Register (Offset 0X4404)-Bcm5722, Bcm5755, Bcm5755M, Bcm5756M; Bcm5757, Bcm5754, Bcm5787 Only - Broadcom BCM5722 Programmer's Manual

Host programmer interface specification for the netxtreme and netlink family of highly integrated media access controllers
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Programmer's Guide
10/15/07
B
M
UFFER
ANAGER
Bit
Field
31
TXFIFO Underrun
Prevention Enable
Reserved (BCM5906
only)
30:6
Reserved
5
Reset RXMBUF Ptr
4
MBUF Low Attn Enable
3
BM Test Mode
2
Attn_Enable
1
Enable
0
Reset
B
M
UFFER
ANAGER
Note: This register is not applicable to the BCM5906 device.
Table 299: Buffer Manager Status Register (Offset 0x4404)—BCM5722, BCM5755, BCM5755M, BCM5756M,
Bit
Field
31:5
BM Test Mode
4
MBUF Low Attn
3
Reserved
2
Error
1:0
Reserved
Document
5722-PG101-R
M
R
(O
ODE
EGISTER

Table 298: Buffer Manager Mode Register (Offset 0x4400)

Description
• 1 = Enable the EMAC TXFIFO underrun prevention during LSO
offload operation. It will change the arbitration algorithm of TXMBUF
read requests to round-robin among CPU, PCIe, RDMA and
TXMAC. When TXFIFO is almost empty, RDMA will hold its request
till TXFIFO is not almost empty.
• 0 = Disable the EMAC TXFIFO underrun prevention during LSO
offload operation. The arbitration algorithm of TXMBUF read
requests will be priority-based among CPU, PCIe, RDMA and
TXMAC. RDMA will ignore TXFIFO almost empty alert.
When this bit is set, it will cause the RXMBUF allocation and
deallocation pointer to reset back to the RXMBUF base. It will also
cause the RXMAC to drop the preallocated MBUF and request a new
one.
MBUF Low Attn Enable MBUF low attention enable.
Buffer Manager Test Mode. Must be set to 0 for normal operation.
When this bit is set to 1, an internal attention is generated when an error
occurs.
This bit controls whether the Buffer Manager is active or not. When set
to 0 it completes the current operation and cleanly halts. Until it is
completely halted, it remains one when read.
When this bit is set to 1, the Buffer Manager state machine is reset. This
is a self-clearing bit.
S
R
(O
TATUS
EGISTER

BCM5757, BCM5754, BCM5787 Only

Description
MBUF low attention status
Buffer Manager error status
Bro adco m Co rp or atio n
0
4400)
FFSET
X
0
4404)
FFSET
X
Init
0x1
0x0
0
0
Init
0
Buffer Manager Control Registers
BCM5722
Access
R/W
RO
RO
R/WC
R/W
R/W
R/W
R/W
R/W
Access
RO
RO
RO
RO
RO
Page 306

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