Programmer's Guide
10/15/07
Offset
0xDA–0xDB
0xDC–0xDF
0xE0–0xE1
0xE2–0xE3
0xE4–0xE7
0xE8
0xE9
0xEA–0xEB
0xEC–0xF3
0xF4–0xF7
0xF8–0xFF
0x100–0x103
0x104–0x107
0x108–0x10B
0x10C–0x10F
0x110–0x113
0x114–0x117
0x118–0x11B
0x11C–0x11F
0x13C–0x13F
0x140–0x143
0x144–0x147
0x148
0x14A
0x14C–0x14F
0x150–0x153
0x154
0x160–0x163
0x164–0x167
0x168–0x16B
0x16C–0x16F
0x170–0x173
0x174–0x177
0x178–0x17B
0x17C–0x17D
0x17E–0x17F
0x180–0x181
0x182–0x183
0x184–0x185
Document
5722-PG101-R
Table 92: PCI Configuration Register Summary (Cont.)
Register
Device Status
Link Capabilities
Link Control
Link Status
Reserved
MSI Capability ID
Next Capability Pointer (null)
MSI Control
MSI Address (64-bit)
MSI Data
Reserved
Advanced Error Reporting Enhanced Capability Header
Uncorrectable Error Status
Uncorrectable Error Mask
Uncorrectable Error Severity
Correctable Error Status
Correctable Error Mask
Advanced Error Capabilities and Control
Header Log
Virtual Channel Enhanced Capability Header
Port VC Capability
Port VC Capability 2
Port VC Control
Port VC Status
VC Resource Capability
VC Resource Control
VC Resource Status
Device Serial No Enhanced Capability Header
Device Serial No Lower DW
Device Serial No Upper DW
(Reserved in BCM5906, BCM5906M)
Power Budgeting Data Select (Reserved in BCM5906, BCM5906M)
Power Budgeting Data (Reserved in BCM5906, BCM5906M)
Power Budgeting Capability (Reserved in BCM5906, BCM5906M)
Firmware Power Budgeting 1 (Reserved in BCM5906, BCM5906M)
Firmware Power Budgeting 2 (Reserved in BCM5906, BCM5906M)
Firmware Power Budgeting 3 (Reserved in BCM5906, BCM5906M)
Firmware Power Budgeting 4 (Reserved in BCM5906, BCM5906M)
Firmware Power Budgeting 5 (Reserved in BCM5906, BCM5906M)
Bro adco m Co rp or atio n
BCM5722
PCI Configuration Registers
Page 188
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