Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2015

Root Complex Expansion ROM Base Address Register
The
PCIE_RC_ROMCFG_[n]
and indicates the upper 21 bits of the Expansion ROM base address.
BASE[4:0] (R/W)
Expansion ROM Base Address
BASE[20:5] (R/W)
Expansion ROM Base Address
Figure 29-195: PCIE_RC_ROMCFG_[n] Register Diagram
Table 29-204: PCIE_RC_ROMCFG_[n] Register Fields
Bit No.
(Access)
31:11 BASE
(R/W)
0 EN
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register controls whether or not the device accepts accesses to its expansion ROM
15 14 13 12 11 10
0 0 0 0 0 0
31 30 29 28 27 26
0 0 0 0 0 0
Bit Name
Expansion ROM Base Address.
The PCIE_RC_ROMCFG_[n].BASE bit field corresponds to the upper 21 bits of
the Expansion ROM base address. The number of bits (out of these 21) that a device
actually implements depends on how much address space the device requires. For in-
stance, a device that requires a 64 KB area to map its expansion ROM would imple-
ment the top 16 bits in the register, leaving the bottom 5 (out of these 21) hardwired
to 0. Devices that support an expansion ROM must implement this register
Expansion ROM Enable.
The PCIE_RC_ROMCFG_[n].EN bit controls whether or not the device accepts ac-
cesses to its expansion ROM. When this bit is 0, the devices expansion ROM address
space is disabled. When the bit is 1, address decoding is enabled using the parameters
in the other part of the base register. This allows a device to be used with or without an
expansion ROM depending on system configuration.
9 8 7 6 5 4 3 2
0 0 0 0 0 0 0 0
25 24 23 22 21 20 19 18
0 0 0 0 0 0 0 0
Description/Enumeration
ADSP-SC58x PCIE Register Descriptions
1 0
0 0
EN (R)
Expansion ROM Enable
17 16
0 0
29–311