Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2028

Sharc+ processor
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ADSP-SC58x PCIE Register Descriptions
Table 29-210: PCIE_RSCK_STAT Register Fields (Continued)
Bit No.
(Access)
6
RFCKRMEN
(R/NW)
5
WRMHTRST
(R/W1C)
4
DBIRST
(R/NW)
3
SLVRST
(R/NW)
2
MSTRST
(R/NW)
1
PHYRST
(R/NW)
0
CORERST
(R/NW)
29–324
Bit Name
Local Reference Clock Removal Enabled.
Warm or Hot Reset Request.
AXI Master Interface Reset.
AXI Slave Interface Reset.
AXI Master Interface Reset.
PCIe PHY Reset.
PCIe Core Reset.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description/Enumeration
0 D0 Power State
1 D1 Power State
2 D2 Power State
3 D3 Power State
4 D0 Uninitialized
0 Local Reference Clock is needed
1 Local Reference Clock can be removed
0 No Reset Request
1 PCIe_DM_CORE issued a Reset Request
0 The AXI DBI IF is out of Reset
1 The AXI DBI IF is Reset
0 The AXI Slave IF is out of Reset
1 The AXI Slave IF is Reset
0 The AXI Master IF is out of Reset
1 The AXI Master IF is Reset
0 The PCIe PHY is out of Reset
1 The PCIe PHY is Reset
0 The PCIe Core is out of reset
1 The PCIe Core is Reset

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