Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2168

Mode (Full Duplex Minimum Gap between two
in all cases) SFDs
1000 Mbps RGMII 64 bytes of data + 8 bytes of pre-
amble + min IFG
(64 + 8 + 12) RGMII clock cy-
cles
84 RGMII clocks
The minimum PTP clock frequency also depends on the maximum value of the
that even at the highest EMAC_TM_SUBSEC.SSINC value, the
ted every second. Since the EMAC_TM_SUBSEC.SSINC is an 8-bit field, the minimum PTP clock frequency al-
lowed is approximately 4 MHz.
Time Stamp Module
The time stamp module captures time in seconds and nanoseconds maintained as system time. The time stamp
module also captures time when specific events occur. Events include detection of a frame transmitted or received
over the EMAC and a rising edge on the EMAC_PTPAUXIN[n] pins. The time stamp module does not need to
time stamp all of the transmitted or received frames over the EMAC. The PTP module can be programmed to de-
tect specific kinds of frames for time stamping.
Frame Detection and Time Stamping
The PTP module automatically monitors all received and transmitted IEEE 1588 event messages on the Ethernet. If
the module detects an event message, it takes a snapshot of the system time. The PTP module stores the value to the
64-bit fields in transmit or receive descriptor.
The time stamping occurs at the EMAC RMII/RGMII interface when the module sees the start of frame of an event
message packet.
Transmit Path Time Stamping
The EMAC captures a time stamp when a frame transmits on the RMII/RGMII. Time stamp capture is controllable
on a per-frame basis. In other words, each transmit frame can be marked to indicate whether a time stamp is cap-
tured for that frame or not.
Applications can extend the descriptor word length from 4 words to 8 words by setting the
EMAC_DMA0_BUSMODE.ATDS bit. To enable the time stamp function, set the TTSE (transmit time stamp ena-
ble) bit in transmit descriptor word TDES0. When the PTP module captures a time stamp of a transmitted frame,
it notifies the application by setting the TTSS (transmit time stamp status) in TDES0.
The EMAC returns the time stamp to the software inside the corresponding transmit descriptor, automatically con-
necting the time stamp to the specific frame. The 64-bit time stamp information is written to the TDES6 and
TDES7 fields. The TDES6 field holds the 32-bit LSBs of the time stamp (system time nanoseconds), except as de-
scribed in transmit time stamp field, and the TDES7 field holds the 32-bit MSBs (system time seconds). After the
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
PTP clock
3 PTP clock cycle + 4 RGMII clock
cycle 84 RGMII clock cycles
3 PTP clock cycle 80 RGMII clock
cycles
PTP clock cycle 26.67 8 ns = 213 ns 1 RGMII clock cycle = (1/125
PTP frequency min = 4.6 MHz
EMAC_TM_SEC
EMAC Precision Time Protocol (PTP) Engine
Comments
In RGMII @ 1000 Mbps, 1 byte
transmitted in 1 clock cycles
RGMII clock at 100 Mbps = 125
MHz
MHz) = 8 ns
register, so
EMAC_TM_SUBSEC
register value can be incremen-
31–77