Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2010

ADSP-SC58x PCIE Register Descriptions
Root Complex I/O Base and Limit Upper 16 bits Register
The
PCIE_RC_IOBL_[n]
Figure 29-190: PCIE_RC_IOBL_[n] Register Diagram
Table 29-199: PCIE_RC_IOBL_[n] Register Fields
Bit No.
(Access)
31:16 LMT
(R/NW)
15:0 BASE
(R/NW)
29–306
register provides the root complex I/O base and limit upper address bits (16 bits).
15 14 13 12
0 0 0 0
BASE (R)
Base Upper Address
31 30 29 28
0 0 0 0
LMT (R)
Limit Upper Address
Bit Name
Limit Upper Address.
The PCIE_RC_IOBL_[n].LMT bit field contains the I/O Limit upper 16 bits.
Base Upper Address.
The PCIE_RC_IOBL_[n].BASE bit field contains the I/O base upper 16 bits.
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
11 10 9 8 7 6 5 4
0 0 0 0 0 0 0 0
27 26 25 24 23 22 21 20
0 0 0 0 0 0 0 0
Description/Enumeration
3 2 1 0
0 0 0 0
19 18 17 16
0 0 0 0