Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2120

Sharc+ processor
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Table 31-14: Transmit Descriptor Fields (TDES0) (Continued)
Bit
Name
20
TCH
19:18
Reserved
19:18
VLIC
17
TTSS
16
IHE
15
ES
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
Description
Second Address Chained. When set, this bit indicates that the second address in the descriptor is
the next descriptor address rather than the second buffer address. When TDES0[20] bit is set,
TBS2 (TDES1[28:16]) is a do-not-care value. TDES0[21] takes precedence over TDES0[20].
VLAN Insertion Control. When set, these bits request the MAC to perform VLAN tagging or
untagging before transmitting the frames. If the frame is modified for VLAN tags, the MAC au-
tomatically recalculates and replaces the CRC bytes. Bit encodings are as follows.
00 = Do not add a VLAN tag.
01 = Remove the VLAN tag from the frames before transmission. This option should be used
only with the VLAN frames.
10 = Insert a VLAN tag with the tag value programmed in the VLAN tag inclusion or replace-
ment
EMAC_VLAN_INCL
11 = Replace the VLAN tag in frames with the tag value programmed in the VLAN tag inclusion
or replacement
EMAC_VLAN_INCL
frames.
These bits are valid when the first segment bit (TDES0[28]) is set.
Transmit Time Stamp Status. This bit is a status bit to indicate that a time stamp is captured for
the described transmit frame. When this bit is set, TDES2 and TDES3 have a time stamp value
captured for the transmit frame.
This field is only valid when the last segment control bit of the descriptor (TDES0[29]) is set.
IP Header Error. When set, this bit indicates that the EMAC transmitter detected an error in the
IP datagram header. The transmitter checks the header length in the IPv4 packet against the
number of header bytes received from the application. It indicates an error status when there is a
mismatch. For IPv6 frames, a header error is reported if the main header length is not 40 bytes.
Furthermore, the Ethernet length or type field value for an IPv4 or IPv6 frame must match the
IP header version received with the packet. For IPv4 frames, an error status is also indicated if the
header length field has a value less than 0x5.
Error Summary. Indicates the logical OR of the following bits:
TDES0[14] = Jabber Timeout
TDES0[13] = Frame Flush
TDES0[11] = Loss of Carrier
TDES0[10] = No Carrier
TDES0[9] = Late Collision
TDES0[8] = Excessive Collision
TDES0[2] = Excessive Deferral
TDES0[1] = Underflow Error
TDES0[16] = IP Header Error
TDES0[12] = IP Payload Error
register.
register. This option should be used only with the VLAN
DMA Descriptors
31–29

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