Analog Devices ADSP-SC58 Series Hardware Reference Manual page 2013

Sharc+ processor
Table of Contents

Advertisement

Prefetchable Base Upper 32 Bits Register
The
PCIE_RC_PREF_BUPP_[n]
Figure 29-193: PCIE_RC_PREF_BUPP_[n] Register Diagram
Table 29-202: PCIE_RC_PREF_BUPP_[n] Register Fields
Bit No.
(Access)
31:0
VALUE
(R/NW)
ADSP-SC58x/ADSP-2158x SHARC+ Processor Hardware Reference
register contains the Prefetchable base upper 32 bits.
15
14
0
0
VALUE[15:0] (R)
Prefetchable Memory Base Address
Upper 32 bits
31
30
0
0
VALUE[31:16] (R)
Prefetchable Memory Base Address
Upper 32 bits
Bit Name
Prefetchable Memory Base Address Upper 32 bits.
The PCIE_RC_PREF_BUPP_[n].VALUE bit field contains the prefetchable base
address upper 32 bits.
13
12
11
10
9
8
7
6
0
0
0
0
0
0
0
0
29
28
27
26
25
24
23
22
0
0
0
0
0
0
0
0
Description/Enumeration
ADSP-SC58x PCIE Register Descriptions
5
4
3
2
1
0
0
0
0
0
0
0
21
20
19
18
17
16
0
0
0
0
0
0
29–309

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the ADSP-SC58 Series and is the answer not in the manual?

This manual is also suitable for:

Adsp-2158 series

Table of Contents