Confirming The Automatic Algorithm Execution Status - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 23 1M-BIT FLASH MEMORY

23.6 Confirming the Automatic Algorithm Execution Status

To provide the writing or deletion flow with an automatic algorithm, the flash memory
contains hardware that notifies an operator of the operating status or of operation
completion within the flash memory. This automatic algorithm enables the operating
status of the built-in flash memory to be confirmed using the following hardware
sequence:
■ Hardware Sequence Flag
The hardware sequence flag consists of the 4-bit outputs DQ7, DQ6, DQ5, and DQ3, which
have functions of the data polling flag (DQ7), toggle bit flag (DQ6), timing limit excess flag
(DQ5), and sector deletion timer flag (DQ3), thereby enabling an operator to confirm whether
the end of writing, the end of chip or sector deletion, and deletion code writing are valid.
The hardware sequence flag can be referenced by a read access to the address of the target
sector within the flash memory after the command sequence (see Table 23.5-1 in Section "23.5
Activating the Automatic Algorithm of the Flash Memory") is set. Table 23.6-1 shows the bit
allocation for the hardware sequence flags.
Table 23.6-1 Bit Allocation for the Hardware Sequence Flags
Hardware sequence flag
To determine whether automatic writing or chip or sector deletion is ongoing, check the
hardware sequence flag or the RDY bit of the flash memory control status register (FMCS),
thereby enabling the operator to determine whether the writing ends. After the writing or deletion
is completed, the read or reset status is returned. To create a program, perform the next
processing such as data reading after confirming the end of the automatic writing or deletion
using either of the flags. The hardware sequence flag can be used to confirm whether the
second and subsequent sector deletion code writings are valid. The subsequent sections
explain the hardware sequence flags. Table 23.6-2 lists the hardware sequence flag functions.
350
Bit No. 7
DQ7
6 5 4
DQ6 DQ5 -
3 2 1
DQ3 - -
0
-