Hardware Standby Mode - Fujitsu F2MC-16LX Hardware Manual
Mb90550a/b series, 16-bit
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Also See for F2MC-16LX:
- Hardware manual (706 pages) ,
- Application note (13 pages) ,
- Operation manual (10 pages)
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CHAPTER 5 LOW-POWER CONSUMPTION CONTROL CIRCUIT
5.4.4
Hardware Standby Mode
In the hardware standby mode, when the HST pin is low, oscillation is stopped and all
I/O pins are set to high impedance regardless of other statuses including resets.
■ Transition to the Hardware Standby Mode
In any state, driving the HST pin low can set the standby control circuit to the hardware standby
mode.
In the hardware standby mode, the contents of internal RAM are retained, but the dedicated
registers such as the accumulator are initialized.
■ Releasing the Hardware Standby Mode
The hardware standby mode can be released only using the HST pin.
When the HST pin is driven high, the standby control circuit releases the hardware standby
mode, enables the internal reset signal, then enters the oscillation stabilization wait state. When
the oscillation stabilization time has elapsed, the standby control circuit releases the internal
reset. The CPU then starts execution from the reset sequence.
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