3.7.1
Standby Mode Operating States
This section describes the operating states of the CPU and peripheral functions in
each standby mode.
Standby Mode Operating States
Table 3.7-1 Operating States of the CPU and Peripheral Functions in Standby Mode
Function
Main clock
Subclock
Instruction
CPU
ROM
RAM
I/O ports
Timebase timer
Watchdog timer
8/16-bit timer/
counter
8-bit serial I/O
Buzzer output
Peripheral
functions
External
interrupts 1 and
2
Watch prescaler
Remote-control
transmission
frequency
generator
Peripheral
control clock
output
Pins
Wake-up from standby
Main clock mode
Stop
RUN
Sleep
(SPL = 0)
Stop
Opera-
ting
Opera-
ting
Stop
Stop
Hold
Hold
Opera-
ting
Stop
Stop
Opera-
ting
Opera-
ting *
Opera-
ting
Opera-
ting
Opera-
ting *
Stop
Opera-
ting *
Hold
Hold
Reset or
Reset or
Reset or
interrupts
interrupts
interrupts
3.7 Standby Modes (Low-power Consumption)
Operating mode
Stop
RUN
(SPL = 1)
Stop
Stop
Opera-
ting
Stop
Opera-
ting
Hold
Stop
Opera-
2
ting *
Stop
Opera-
ting
Opera-
Opera-
2
2
2
ting *
ting *
Opera-
ting
Opera-
Opera-
1
1
ting *
ting
Stop
Opera-
Opera-
2
2
2
ting *
ting *
Hi-z
Opera-
ting
Reset or
Reset or
interrupts
interrupts
Subclock mode
Stop
Stop
Sleep
(SPL = 0)
(SPL = 1)
Stop
Opera-
Stop
Stop
ting
Stop
Hold
Hold
Hold
Stop
Stop
Stop
Opera-
ting
Opera-
2
ting *
Opera-
Opera-
ting
ting
Opera-
ting
Stop
Stop
Opera-
2
ting *
Hold
Hold
Hi-z
Reset or
Reset or
Reset or
interrupts
interrupts
interrupts
Watch
Stop
Opera-
ting
Stop
Hold
Stop
Opera-
2
ting *
Opera-
ting
Opera-
2
ting *
Hold
Reset or
interrupts
75