Operation Of Extended Intelligent I/O Service (Ei 2 Os) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 3 INTERRUPT
3.7.3 Operation of Extended Intelligent I/O Service (EI
When a peripheral resource outputs an interrupt request with the interrupt control
register (ICR) set in advance to activate EI
A hardware interrupt is caused upon completion of the EI
I Processing procedure of the Extended Intelligent I/O Service (EI
Figure 3.7-7 Operation flow of Extended Intelligent I/O Service (El
2
ISD : EI
2
ISCS : EI
IF : I/OA update/fixed selection bit
in the EI
BW : Transfer data length specification
bit in the EI
BF : BAP update/fixed selection bit in the
2
EI
88
Interrupt request
generated by peripheral
function
NO
ISE="1"
YES
Read ISD/ISCS
Termination
YES
request from peripheral
function
NO
YES
DIR="1"
NO
Data indicated by I/OA
(data transfer)
memory indicated by BAP
YES
IF="0"
NO
YES
BF="0"
NO
(-1)
Decrement DCT
YES
DCT="00 "
B
NO
Set S1 and S0 to "00 "
B
Clear interrupt request from
the peripheral function
Return to CPU operation
OS descriptor
OS status register
2
OS status register (ISCS)
2
OS status register (ISCS)
OS status register (ISCS)
2
OS, the CPU transfers data using EI
2
2
OS)
Interrupt sequence
SE="1"
NO
Data indicated by BAP
(data transfer)
memory indicated by I/OA
Update value
Update I/OA
by BW
Update value
Update BAP
by BW
EI 2 OS termination processing
Set S1 and S0 to "01 " Set S1 and S0 to "11
B
Clear ISE to "0"
Interrupt sequence
DIR : Data transfer direction specification
2
bit in the EI OS status register (ISCS)
2
SE : EI OS termination control bit in the
2
EI OS status register (ISCS)
DCT : Data counter
I/OA : I/O register address pointer
BAP : Buffer address pointer
2
ISE : EI OS enable bit in the interrupt control register (ICR)
S1, S0: EI 2 OS status in the interrupt control register (ICR)
2
OS)
OS process.
2
OS)
YES
"
B
2
OS.