ABB ACS880 Firmware Manual page 355

No. Name / Range /
Selection
DI2
DI3
DI4
DI5
DI6
DIO1
DIO2
Other [bit]
28.78 Freq ramp output
balancing
-598.00 ... 598.00 Hz
28.79 Freq ramp out
balancing enable
Not selected
Selected
DI1
DI2
DI3
DI4
DI5
DI6
DIO1
DIO2
Other [bit]
28.90 Frequency ref act 1
-598.00 ... 598.00 Hz
Description
Digital input DI2 (10.2 DI delayed
Digital input DI3 (10.2 DI delayed
Digital input DI4 (10.2 DI delayed
Digital input DI5 (10.2 DI delayed
Digital input DI6 (10.2 DI delayed
Digital input/output DIO1
0).
Digital input/output DIO2
1).
See Terms and abbreviations (page
Defines a reference for frequency ramp balancing. The
output of the ramp generator is forced to this value
when balancing is enabled by parameter
ramp out balancing enable.
Frequency ramp balancing reference. For scaling, see
parameter 46.2.
Selects the source for enabling/disabling speed ramp
balancing. See parameter
balancing.
0 = Disabled
1 = Enabled
0
1
Digital input DI1 (10.2 DI delayed
Digital input DI2 (10.2 DI delayed
Digital input DI3 (10.2 DI delayed
Digital input DI4 (10.2 DI delayed
Digital input DI5 (10.2 DI delayed
Digital input DI6 (10.2 DI delayed
Digital input/output DIO1
0).
Digital input/output DIO2
1).
See Terms and abbreviations (page
Displays the value of frequency reference source 1
(selected by parameter
See the control chain diagram on page 756.
This parameter is read-only.
Value of frequency reference source 1. For scaling, see
parameter 46.2.
status, bit 1).
status, bit 2).
status, bit 3).
status, bit 4).
status, bit 5).
(11.2 DIO delayed status, bit
(11.2 DIO delayed status, bit
169).
28.79 Freq
28.78 Freq ramp output
status, bit 0).
status, bit 1).
status, bit 2).
status, bit 3).
status, bit 4).
status, bit 5).
(11.2 DIO delayed status, bit
(11.2 DIO delayed status, bit
169).
28.11 Frequency ref1 source).
Parameters 355
Def / Type
FbEq 16b / 32b
3
4
5
6
7
10
11
- / real32
- / -
Not selected / uint32
0
1
2
3
4
5
6
7
10
11
- / real32
- / -