Register And Display Memory Access - Renesas F-ZTAT H8 Series Hardware Manual

8-bit single-chip microcomputer
Hide thumbs Also See for F-ZTAT H8 Series:
Table of Contents

Advertisement

14. Dot Matrix LCD Controller (H8/3854 Group)
14.3.6

Register and Display Memory Access

Register Access
To access a register, RS is first cleared to 0 and the register number of the register to be accessed
is set in the index register. Then RS is set to 1, enabling the specified register to be accessed.
Some internal registers have nonexistent bits; 0 must be written to these bits. The display data
register (LR4) is the only register that can be read.
Display Memory Access
To access the display memory, the address to be accessed is set in the address register (LR2). The
memory is then accessed via the display data register (LR4). This access can be performed without
awareness of the display-side read. See figure 14.6 for the procedure.
After the respective display data register (LR4) accesses, the X and Y addresses are automatically
incremented on the basis of the value set in the INC bit in control register 2 (LR1), and therefore
address settings need not be made each time.
With 1/16 duty (DDTY1 = 0), if INC = 0 the X address remains the same in each read/write access
to the display data register (LR4), while the Y address is automatically incremented up to H'F.
After reaching H'F, the Y address returns to H'0 again, and the X address is simultaneously
incremented. If INC = 1, on the other hand, the Y address remains the same in each read/write
access to the display data register (LR4), while the X address is automatically incremented up to
H'4. After reaching H'4, the X address returns to H'0 again, and the Y address is simultaneously
incremented. In this way, consecutive read/write accesses can be made to the entire display
memory area.
Rev.3.00 Jul. 19, 2007 page 391 of 532
REJ09B0397-0300

Advertisement

Table of Contents
loading

Table of Contents