Arithmetic Operations - Renesas F-ZTAT H8 Series Hardware Manual

8-bit single-chip microcomputer
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2. CPU
2.5.2

Arithmetic Operations

Table 2.5 describes the arithmetic instructions.
Table 2.5
Arithmetic Instructions
Instruction
Size*
ADD
B/W
SUB
ADDX
B
SUBX
INC
B
DEC
ADDS
W
SUBS
DAA
B
DAS
MULXU
B
DIVXU
B
CMP
B/W
NEG
B
Note:
Size: Operand size
*
B:
Byte
W:
Word
Rev.3.00 Jul. 19, 2007 page 44 of 532
REJ09B0397-0300
Function
Rd ± Rs → Rd, Rd + #IMM → Rd
Performs addition or subtraction on data in two general registers, or
addition on immediate data and data in a general register. Immediate
data cannot be subtracted from data in a general register. Word data
can be added or subtracted only when both words are in general
registers.
Rd ± Rs ± C → Rd, Rd ± #IMM ± C → Rd
Performs addition or subtraction with carry or borrow on byte data in
two general registers, or addition or subtraction on immediate data and
data in a general register.
Rd ± 1 → Rd
Increments or decrements a general register by 1.
Rd ± 1 → Rd, Rd ± 2 → Rd
Adds or subtracts immediate data to or from data in a general register.
The immediate data must be 1 or 2.
Rd decimal adjust → Rd
Decimal-adjusts (adjusts to packed 4-bit BCD) an addition or
subtraction result in a general register by referring to the CCR
Rd × Rs → Rd
Performs 8-bit × 8-bit unsigned multiplication on data in two general
registers, providing a 16-bit result
Rd ÷ Rs → Rd
Performs 16-bit ÷ 8-bit unsigned division on data in two general
registers, providing an 8-bit quotient and 8-bit remainder
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another general
register or with immediate data, and the result is stored in the CCR.
Word data can be compared only between two general registers.
0 – Rd → Rd
Obtains the two's complement (arithmetic complement) of data in a
general register

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