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PWDRL—PWM data register L
Bit
PWDRL7
Initial value
Read/Write
W
PDR1—Port data register 1
Bit
7
P1
Initial value
0
Read/Write
R/W
Note: * P1
, P1
, and P1
6
4
In the H8/3854 Group these bits are reserved, and must always be set to 1.
PDR2—Port data register 2
Bit
P2
Initial value
Read/Write
R/W
PDR3—Port data register 3
Bit
P3
Initial value
Read/Write
R/W
7
6
5
PWDRL6
PWDRL5 PWDRL4 PWDRL3
0
0
0
W
W
Lower 8 bits of data for generating PWM waveform
6
5
*
P1
P1
7
6
5
0
0
R/W
R/W
are functions of the H8/3857 Group only.
3
7
6
5
P2
P2
7
6
0
0
0
R/W
R/W
7
6
5
P3
P3
7
6
0
0
0
R/W
R/W
4
3
0
0
W
W
4
3
*
*
P1
P1
4
3
0
0
R/W
R/W
4
3
P2
P2
5
4
3
0
0
R/W
R/W
4
3
P3
P3
5
4
3
0
0
R/W
R/W
Rev.3.00 Jul. 19, 2007 page 495 of 532
Appendix B Internal I/O Registers
H'D2
(H8/3857 Group only)
2
1
PWDRL2 PWDRL1
0
0
W
W
H'D4
2
1
P1
P1
2
1
0
0
R/W
R/W
H'D5
2
1
P2
P2
2
1
0
0
R/W
R/W
H'D6
(H8/3857 Group only)
2
1
P3
P3
2
1
0
0
R/W
R/W
REJ09B0397-0300
14-bit PWM
0
PWDRL0
0
W
I/O ports
0
P1
0
0
R/W
I/O ports
0
P2
0
0
R/W
I/O ports
0
P3
0
0
R/W
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