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6. ROM
performed even if writing fewer than 32 bytes; in this case, H'FF data must be written to the extra
addresses.
Next, the watchdog timer is set to prevent overprogramming in the event of program runaway, etc.
Set a value greater than (y + z + α + β) μs as the WDT overflow period. After this, preparation for
program mode (program setup) is carried out by setting the PSU bit in FLMCR2, and after the
elapse of (y) μs or more, the operating mode is switched to program mode by setting the P bit in
FLMCR1. The time during which the P bit is set is the flash memory programming time. Make a
program setting so that the time for one programming operation is within the range of (z) μs.
6.5.2
Program-Verify Mode
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of the given programming time, the programming mode is exited (the P bit in
FLMCR1 is cleared, then the PSU bit in FLMCR2 is cleared at least (α) μs later). The watchdog
timer is cleared following the elapse of more than (y + z + α + β) μs after being set, and the
operating mode is switched to program-verify mode by setting the PV bit in FLMCR1. Before
reading in program-verify mode, a dummy write of H'FF data should be made to the addresses to
be read. The dummy write should be executed after the elapse of (γ) μs or more. When the flash
memory is read in this state (verify data is read in 16-bit units), the data at the latched address is
read. Wait at least (ε) μs after the dummy write before performing this read operation. Next, the
originally written data is compared with the verify data, and reprogramming data is computed (see
figure 6.12) and transferred to the reprogramming data area. After 32 bytes of data have been
verified, exit program-verify mode, wait for at least (η) μs, then clear the SWE bit in FLMCR1. If
reprogramming is necessary, set program mode again, and repeat the program/program-verify
sequence as before. However, ensure that the program/program-verify sequence is not repeated
more than (N) times on the same bits.
Note: A 32-byte area for storing programming data and a 32-byte area for storing
reprogramming data must be provided in RAM.
Rev.3.00 Jul. 19, 2007 page 141 of 532
REJ09B0397-0300
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