Renesas F-ZTAT H8 Series Hardware Manual page 532

8-bit single-chip microcomputer
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Appendix B Internal I/O Registers
IRR2—Interrupt request register 2
Bit
7
IRRDT
Initial value
0
Read/Write
R/W
Timer B interrupt request flag
Timer C interrupt request flag
0 [Clearing condition]
1 [Setting condition]
Timer FL interrupt request flag
0 [Clearing condition]
1 [Setting condition]
Timer FH interrupt request flag
0 [Clearing condition]
1 [Setting condition]
A/D converter interrupt request flag
0 [Clearing condition]
1 [Setting condition]
Direct transfer interrupt request flag
0 [Clearing condition]
1 [Setting condition]
Notes: 1. IRRTC is a function of the H8/3857 Group only.
In the H8/3854 Group this bit is reserved, and is always 0.
2. Only a write of 0 for flag clearing is possible.
Rev.3.00 Jul. 19, 2007 page 506 of 532
REJ09B0397-0300
6
5
IRRAD
0
0
*2
*2
R/W
0 [Clearing condition]
1 [Setting condition]
When IRRTFL = 1, it is cleared by writing 0
When counter FL matches output compare register FL
in 8-bit mode
When IRRTFH = 1, it is cleared by writing 0
When counter FH matches output compare register FH in
8-bit mode, or when 16-bit counter F (TCFL, TCFH)
matches 16-bit output compare register F (OCRFL,
OCRFH) in 16-bit mode
When IRRAD = 1, it is cleared by writing 0
When A/D conversion is completed and ADSF is reset
When IRRDT = 1, it is cleared by writing 0
A SLEEP instruction is executed when DTON = 1 and a direct
transfer is made
4
3
IRRTFH
0
0
*2
R/W
When IRRTB = 1, it is cleared by writing 0
When the timer B counter overflows from
H'FF to H'00
When IRRTC = 1, it is cleared by writing 0
When the timer C counter overflows from H'FF to H'00
or underflows from H'00 to H'FF
H'F7
System control
2
1
*1
IRRTFL
IRRTC
0
0
*2
*2
R/W
R/W
0
IRRTB
0
*2
R/W

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