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V
CC
V
CC
P1
n
V
SS
Legend:
PDR1:
Port data register 1
PCR1:
Port control register 1
PMR1:
Port mode register 1
PUCR1:
Port pull-up control register 1
Note:
n = 2 or 1
Figure C.1 (d) Port 1 Block Diagram (Pins P1
SBY
Appendix C I/O Port Block Diagrams
PUCR1
n
PMR1
n
PDR1
n
PCR1
n
and P1
)
2
1
Rev.3.00 Jul. 19, 2007 page 511 of 532
Timer F module
TMOFH (P1 )
2
TMOFL (P1 )
1
Internal
data bus
REJ09B0397-0300
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