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when FWE = 1, then setting the ESU bit in FLMCR2, and finally setting the E bit. FLMCR1 is
initialized by a reset and in standby mode. Its initial value is H'80 when a high level is input to the
FWE pin, and H'00 when a low level is input.
Writes to the SWE bit in FLMCR1 are enabled only when FWE = 1; writes to the EV and PV bits
only when FWE = 1 and SWE = 1; writes to the E bit only when FWE = 1, SWE = 1, and ESU =
1; and writes to the P bit only when FWE = 1, SWE = 1, and PSU = 1.
Bit 7—Flash Write Enable (FWE): Bit 7 sets hardware protection against flash memory
programming/erasing. See section 6.9, Flash Memory Programming and Erasing Precautions, for
more information on the use of this bit.
Bit 7: FWE
Description
0
When a low level is input to the FWE pin (hardware-protected state)
1
When a high level is input to the FWE pin
Bit 6—Software Write Enable (SWE)*
and erasing. (This bit should be set before setting bits ESU, PSU, EV, PV, E, P, and EB6 to EB0,
and should not be cleared at the same time as these bits.)
Bit 6: SWE
Description
0
Programming/erasing disabled
1
Programming/erasing enabled
[Setting condition]
When FWE = 1
Bits 5 and 4—Reserved Bits: Bits 5 and 4 are reserved; they are always read as 0 and cannot be
modified.
Bit 3—Erase-Verify (EV)*
SWE, ESU, PSU, PV, E, or P bit at the same time.)
Bit 3: EV
Description
0
Erase-verify mode cleared
1
Transition to erase-verify mode
[Setting condition]
When FWE = 1 and SWE = 1
1
2
*
: Bit 6 enables or disables flash memory programming
1
: Bit 3 selects erase-verify mode transition or clearing. (Do not set the
Rev.3.00 Jul. 19, 2007 page 127 of 532
6. ROM
(initial value)
(initial value)
REJ09B0397-0300
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