Control Register 1 (Lr0) - Renesas F-ZTAT H8 Series Hardware Manual

Bits 3 to 0—Index Register (IR3 to IR0): Bits 3 to 0 are used to select one of the LCD
controller's ten control registers. The correspondence between the settings of IR3 to IR0 and the
selected registers is shown in table 13.2. Other settings are invalid.
13.2.2

Control Register 1 (LR0)

Bit 7
⎯
⎯
Initial value
⎯
Read/Write
LR0 is an 8-bit write-only register that performs LCD module standby mode setting, step-up
circuit control, switching between character display and graphic display, and drive duty selection.
Upon reset, LR0 is initialized to H'00.
Bits 7 and 6—Reserved Bits: Bits 7 and 6 are reserved; they should always be cleared to 0.
Bit 5—Module Standby (LSBY): Bit 5 is the module standby setting bit. When LSBY is set to 1,
the LCD controller enters standby mode. At this time, the state of the PWR bit is not affected, but
the DISP and OPON bits in LR1 are reset.
Bit 5: LSBY Description
0 LCD controller operates normally
1 Step-up and internal operations halt, display is turned off, and LCD controller enters
standby mode
Bit 4—Step-Up Circuit Operation Setting (PWR): Bit 4 selects operation or halting of the step-
up circuit.
Bit 4: PWR Description
0 Step-up circuit halts
1 Step-up circuit operates
Bit 3—Reserved Bit: Bit 3 is reserved; it should always be cleared to 0.
6 5
⎯
LSBY PWR
⎯
0
⎯
W W
13. Dot Matrix LCD Controller (H8/3857 Group)
4 3 2
⎯
SOB
⎯
0 0
⎯
W
Rev.3.00 Jul. 19, 2007 page 331 of 532
1 0
DDTY1 DDTY0
0 0
W W
(initial value)
(initial value)
REJ09B0397-0300