Address Register (Lr2) - Renesas F-ZTAT H8 Series Hardware Manual

Bit 1—Increment Address Select (INC): Bit 1 selects either the X address or the Y address as
the address to be incremented after the display memory access specified by the RMW bit. The
selected address is cleared after a display memory access with the maximum value for the valid
display data area; in this case the other address is incremented.
Bit 1: INC Description
0 Incrementing of display memory Y address has priority; X address is incremented
after Y address overflow
1 Incrementing of display memory X address has priority; Y address is incremented
after X address overflow
Bit 0—Reserved Bit: Bit 0 is reserved; it should always be cleared to 0.
14.2.4

Address Register (LR2)

Bit
7
XA2
Initial value
0
Read/Write
W
LR2 is an 8-bit write-only register that sets the display memory X- and Y-direction addresses
accessed by the CPU.
Upon reset, LR2 is initialized to H'00.
Bits 7 to 5—X Address Setting (XA2 to XA0): Bits 7 to 5 set the display memory X-direction
address. A value from H'0 to H'4 can be set. Do not perform access in the range H'5 to H'7.
When the INC bit in LR1 is set to 1, the address is automatically incremented after the access
specified by the RMW bit in LR1, and is cleared after an H'4 access. When INC is 0 and YA3 to
YA0 represent the maximum value for the valid display data area, the address is incremented after
the access specified by RMW.
Bit 4—Reserved Bit: Bit 4 is reserved; it should always be cleared to 0.
Bits 3 to 0—Y Address Setting (YA3 to YA0): Bits 3 to 0 set the display memory Y-direction
address. A value from H'0 to H'F can be set, but display data from H'8 to H'F is invalid with 1/8
duty.
When the INC bit in LR1 is cleared to 0, the address is automatically incremented after the access
specified by the RMW bit in LR1, and is cleared after an access with the maximum value for the
6 5
XA1 XA0
0 0
W W
14. Dot Matrix LCD Controller (H8/3854 Group)
4 3
⎯
YA3 YA2
⎯
0
⎯
W
Rev.3.00 Jul. 19, 2007 page 381 of 532
(initial value)
2 1
YA1 YA0
0 0
W W
REJ09B0397-0300
0
0
W