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14.3.4
Display Memory Configuration and Display
The LCD controller includes 40 × 16-bit bit-mapped display memory. As the display memory
configuration, an 8-bit × 5 X-direction combination can be selected, while the Y-direction
configuration is 16 bits. Display data written from the CPU is stored horizontally with the MSB at
the left and the LSB at the right, as shown in figure 14.4. On the display, 1 data corresponds to
illumination (black), and 0 data to non-illumination (colorless).
COM1
COM2
SEG1
SEG2
Y address
H'00
1
0
H'01
0
1
DB7
(MSB)
SEG3
SEG5
SEG7
SEG4
SEG6
SEG8
1
0
1
0
1
0
0
1
0
1
0
1
DB0
(LSB)
Figure 14.4 Memory Data and Display
14. Dot Matrix LCD Controller (H8/3854 Group)
LCD
Display memory
Rev.3.00 Jul. 19, 2007 page 389 of 532
SEG40
REJ09B0397-0300
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