Block Diagram - Renesas F-ZTAT H8 Series Hardware Manual

8-bit single-chip microcomputer

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Block Diagram

: System control register 3*

: Flash memory control register 1*

: Flash memory control register 2*

: Erase block register*

The registers that control the flash memory (FLMCR1, FLMCR2, EBR, and MDCR)

are for use exclusively by the flash memory version, and are not provided in the

mask ROM version.

In the mask ROM version, a read access to the address of a register other than

MDCR will always return 0, a read access to the address (H'FF89) corresponding to

MDCR will return an undefined value, and writes are invalid.

Internal data bus (lower 8 bits)

Internal data bus (upper 8 bits)

Bus interface/controller

On-chip flash memory (60 kbytes)

(even address)

Figure 6.2 Block Diagram of Flash Memory

(odd address)

Rev.3.00 Jul. 19, 2007 page 121 of 532

REJ09B0397-0300