Renesas F-ZTAT H8 Series Hardware Manual page 112

8-bit single-chip microcomputer
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3. Exception Handling
Program execution state
PC contents saved
CCR contents saved
Branch to interrupt
handling routine
Legend:
PC:
Program counter
CCR:
Condition code register
I:
I bit of CCR
Note: * The IRQ
, SCI1, and timer C interrupts are functions of the H8/3857 Group only, and are not provided in the
2
H8/3854 Group.
Rev.3.00 Jul. 19, 2007 page 86 of 532
REJ09B0397-0300
No
IRRI0 = 1
Yes
No
IEN0 = 1
Yes
IRRI1 = 1
Yes
IEN1 = 1
Yes
No
I = 0
Yes
I ← 1
Figure 3.3 Flow up to Interrupt Acceptance
No
No
No
IRRI2 = 1*
Yes
No
IEN2 = 1*
Yes
IRRDT = 1
IENDT = 1
No
Yes
No
Yes

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