Renesas F-ZTAT H8 Series Hardware Manual page 316

8-bit single-chip microcomputer
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10. Serial Communication Interface
Start
Read bits OER, PER, and
1
FER in SSR
OER + PER +
FER = 1
2
Read bit RDRF in SSR
RDRF = 1?
Read received data in RDR
3
Continue receiving?
Clear bit RE in SCR3 to 0
End
Start receive
4
error processing
OER = 1?
No
FER = 1?
No
PER = 1?
No
Clear bits OER, PER, and
FER in SSR to 0
End receive error
processing
Figure 10.12 Typical Serial Data Receiving Flow Chart in Asynchronous Mode
Rev.3.00 Jul. 19, 2007 page 290 of 532
REJ09B0397-0300
Yes
No
No
Yes
4
Receive error processing
Yes
No
A
Yes
Yes
Yes
Parity error
processing
1. Read bits OER, PER, and
FER in the serial status
register (SSR) to
determine if a receive
error has occurred.
If a receive error has
occurred, receive error
processing is executed.
2. Read the serial status register
(SSR), and after confirming
that bit RDRF = 1, read
received data from the receive
data register (RDR).
When RDR data is read, RDRF
is automatically cleared to 0.
3. To continue receiving data,
read bit RDRF and finish
reading RDR before the stop
bit of the present frame is
received.
When data is read from RDR,
RDRF is automatically cleared
to 0.
4. When a receive error occurs,
read bits OER, PER, and FER
in SSR to determine which
error (s) occurred.
After the necessary error
processing, be sure to clear
the above bits all to 0.
Data receiving cannot be resumed
Overrun error
while any of bits OER, PER, or
processing
FER is set to 1.
When a framing error occurs,
a break can be detected by
reading the RXD pin value.
Yes
Break?
No
Framing error
processing
A

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