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Appendix B Internal I/O Registers
PMR5—Port mode register 5
Bit
WKP
Initial value
Read/Write
R/W
PWCR—PWM control register
Bit
⎯
Initial value
⎯
Read/Write
Clock select
0 The input clock is φ/2 (tφ* = 2/φ). The conversion period is 16,384/φ,
1 The input clock is φ/4 (tφ* = 4/φ). The conversion period is 32,768/φ,
Note: tφ: Period of PWM input clock
*
PWDRU—PWM data register U
Bit
⎯
Initial value
⎯
Read/Write
Rev.3.00 Jul. 19, 2007 page 494 of 532
REJ09B0397-0300
6
5
7
WKP
WKP
6
7
0
0
0
R/W
R/W
7
6
5
⎯
⎯
1
1
1
⎯
⎯
with a minimum modulation width of 1/φ
with a minimum modulation width of 2/φ
7
6
5
⎯
PWDRU5 PWDRU4PWDRU3
1
1
0
⎯
W
Upper 6 bits of data for generating PWM waveform
4
3
WKP
WKP
5
4
3
0
0
R/W
R/W
P5 /WKP pin function switch
n
n
0 Functions as P5 I/O pin
n
1 Functions as WKP input pin
4
3
⎯
⎯
1
1
⎯
⎯
4
3
0
0
W
W
H'CC
2
1
WKP
WKP
2
1
0
0
R/W
R/W
n
H'D0
14-bit PWM
(H8/3857 Group only)
2
1
⎯
⎯
1
1
⎯
⎯
H'D1
14-bit PWM
(H8/3857 Group only)
2
1
PWDRU2 PWDUR1
0
0
W
W
I/O ports
0
WKP
0
0
R/W
0
PWCR0
0
W
0
PWDRU0
0
W
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