Renesas F-ZTAT H8 Series Hardware Manual page 268

9. Timers
An overflow period of 1 to 256 times the selected clock can be set.
Block Diagram
Figure 9.8 shows a block diagram of the watchdog timer.
φ
PSS
Legend:
TCSRW : Timer control/status register W
TCW : Timer counter W
PSS : Prescaler S
TMW : Timer mode register W
Register Configuration
Table 9.14 shows the watchdog timer register configuration. These registers are valid only in the
F-ZTAT version. In the mask ROM version, read accesses to the corresponding addresses will
always return 1, and writes are invalid.
Table 9.14 Watchdog Timer Registers
Name
Timer control/status register W
Timer counter W
Timer mode register W
Rev.3.00 Jul. 19, 2007 page 242 of 532
REJ09B0397-0300
Figure 9.8 Block Diagram of Watchdog Timer
Abbr.
TCSRW
TCW
TMW
TCSRW
TCW
TMW
R/W Initial Value
R/W H'AA
R/W H'00
R/W H'FF
Internal reset signal
Address
H'FF90
H'FF91
H'FF92